‘reVISION Accelerating Embedded Vision and Machine Learning applications at the Edge’
The EMVA could win Mr. Giles Peckham, Regional Marketing Director at XILINX, to speak at the debut edition of Embedded VISION Europe.
Giles has more than 30 years’ experience in the semiconductor industry, starting with the design of ASSPs for consumer applications at NXP before moving on to FAE and marketing roles for gate array and standard cell products and finally a sales role in the same organisation. After five years in international marketing and sales roles at European Silicon Structures, the e-beam direct-write ASIC company, Giles recognised the increasing potential for FPGAs and joined Xilinx.
Whilst at Xilinx, he has held a number of technical and commercial marketing roles in EMEA and now runs a global marketing team from his office in London. Giles holds a BSC in Electronic Engineering and Physics from Loughborough University, UK and a Professional Postgraduate Diploma in Marketing from the Chartered Institute of Marketing in the UK.
Abstract of Giles’ presentation:
The traditional approach to developing programmable logic based embedded vision and machine learning systems is to first use a high-level modelling language such as Open VX / OpenCV or Caffe to define the algorithm. Once the algorithm has been defined, it is then recreated by a specialist team within a HDL, targeted for the selected programmable logic device. This approach introduces a disconnection between the high-level algorithm and the implemented algorithm which significantly increases development time, programme risk, and NRE cost. What is needed is the ability to work with high-level, industry standard frameworks and libraries without the need to rewrite the algorithm into a specific HDL at a lower level.
The reVISION™ acceleration stack which supports both All Programmable Zynq® UltraScale+™ MPSoC and Zynq®-7000 SoC developments, addresses these challenges and eliminates the gap. reVISION provides support for both OpenVX and OpenCV in the embedded vision sphere and Caffe for machine learning. At the core of the reVISION stack is the SDSoC™ tool which enables system level development of the Zynq-7000 and Zynq MPSoC using high-level languages such as C, C++ and OpenCL™. SDSoC, as a system optimising compiler, enables the designer to identify bottlenecks which impact performance within the processing system once the algorithm has been developed, and accelerate these into the programmable logic. This acceleration is performed without the need for an HDL specialist. This is made possible thanks to SDSoC’s combination of Vivado® High-Level Synthesis and a connectivity framework to seamlessly move functions between the processing system and the programmable logic. To support this, reVISION provides several acceleration capable OpenCV functions (including the OpenVX Core Subset) for embedded vision and machine learning inference engine elements.
Embedded vision developers are therefore able to leverage the benefits of using these SoC devices, and the image processing pipeline can be implemented within the device’s programmable logic. Using the acceleration capable OpenCV functions enables the development of the algorithm once in an industry standard framework. This frees up the processing system to be used to implement the higher level, decision making algorithms and system / communication functions. When it comes to decision making, reVISION provides support for Caffe and can take a prototxt file to define a Convolutional Neural Network, which can be implemented within the programmable logic.
Such an approach to both embedded vision and machine learning removes system bottlenecks and produces a system which is more responsive, power efficient and reconfigurable than a traditional GPU/CPU based approach.
The debut of EMVA’s brandnew conference Embedded VISION Europe, supplemented by an already well booked table top exhibition, will take place 12-13 October 2017 in Stuttgart.
Find all conference details at www.embedded-vision-emva.org